The invention relates generally to electronic oscillators and deals more particularly with an oscillator exhibiting high and low levels with different duty cycles.
Oscillators (or "astable multivibrators") are used in a variety of circuits such as power supplies. Oscillators with frequencies less than 100 MHz are often formed from an amplifier 10 with both positive and negative feedback as illustrated by the prior art oscillator 8 of FIG. 1. The positive feedback is made via a resistor 11, and the negative feedback is made via a resistor 12. A voltage divider comprising resistors 16 and 18 supplies a reference voltage to the noninverting input of the amplifier, and a capacitor 20 connects the inverting input to ground. When the output of the amplifier exhibits a level, a fraction immediately appears at the noninverting input. The amplifier 10 exhibits a high level and begins to charge capacitor 20 via resistor 12. When capacitor 20 charges to the fractional level exhibited at the noninverting input, the output of the amplifier changes to the low level. A fraction of this low level immediately appears at the noninverting input, and also begins to discharge capacitor 20. When capacitor 20 discharges below the fractional level exhibited at the noninverting input, the output of the amplifier changes back to the high level. This process continuously repeats itself yielding alternating high and low levels at the output of the amplifier such that the amplifier output forms an oscillation signal. This oscillation signal is symmetrical in that each of the output levels of the amplifier has a 50% duty cycle. The values of the resistors and capacitor 20 determine the overall frequency. The manufacturing tolerances of the resistors and capacitor, if integrated, and changes in temperature on both discrete and integrated components also affect the overall frequency.
In some types of power supplies, it is desirable to have an asymmetrical oscillator in which the high and low levels have different duty cycles from each other. The longer duty cycle level can be used to set the basic frequency of operation for the power supply, and the shorter duty cycle level can be used to cause a dead time between complementary power switches to ensure that both switches are not closed during the switching transition. In the prior art circuit of FIG. 1, if a diode 22 and series resistor 24 are connected in parallel with resistor 12, then the oscillator becomes asymmetrical with one output level existing for more than 50% of the cycle and the other output level existing for less than 50%of the cycle. The values of the resistors and capacitor 20 determine the overall frequency and duty cycle of each output level. The manufacturing tolerances of the resistors and capacitor, if integrated, and temperature also affect the overall frequency and the duty cycle of each output level. In some applications, the shorter duration level may be required for 50-100 nanoseconds. At such a short duration, the foregoing affects of manufacturing tolerance and temperature are significant and present a real problem with the design of FIG. 1.
FIG. 2 illustrates another asymmetrical oscillator 25 according to the prior art; Oscillator 25 provides greater precision than oscillator 8 of FIG. 1. The asymmetrical oscillator 25 of FIG. 2 includes a comparator 30 and switches 32 and 34 interposed between respective reference voltages 36 and 38 and the noninverting input of the comparator. The asymmetrical oscillator also includes a discrete capacitor 39 connected between the inverting input and ground, a current source 40 for charging the capacitor through a switch 42 and another current source 43 for discharging the capacitor through another switch 44. The opening and closing of the switches 32, 34, 42 and 44 is controlled by the output of the comparator such that when the comparator 30 outputs a high level, switches 32 and 42 are open and switches 34 and 44 are closed. Conversely, when the comparator 30 outputs a low level, switches 32 and 42 are closed and switches 34 and 44 are open.
The basic operation of oscillator 25 is as follows. When switches 32 and 42 are closed (and switches 34 and 44 are open) based on a high level output from comparator 30, the higher reference voltage 36 is applied to the noninverting input of the comparator and current from current source 40 begins to charge capacitor 39. When the voltage across capacitor 39 exceeds the reference voltage 36, the comparator switches to its low level. This opens switches 32 and 42 and closes switches 34 and 44. Then, the lower reference voltage 38 is applied to the noninverting input of the comparator, and current sink 43 begins to discharge capacitor 39. When the voltage across capacitor 39 drops below the reference voltage 38, the comparator switches back to the high level. Thus, the comparator output alternates between its high and low levels creating an oscillation signal.
The magnitudes of the reference voltages 36 and 38 and current sources 40 and 43 determine the frequency of the switching of comparator 30, and the magnitudes of current sources 40 and 43 determine the duty cycles of the high and low levels output from comparator 30. Assuming the voltage references and discrete capacitor have high precision, the precision of the oscillator is limited by the tolerances of and temperature effects on the current sources.
While the oscillator 25 of FIG. 2 provides better precision than the oscillator 8 of FIG. 1, improvements are required for even better precision on the overall frequency of the oscillator and high and low level duty cycles.
Accordingly, a general object of the present invention is to provide an asymmetrical oscillator with better precision of the overall frequency and high and low level duty cycles than the prior art.